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Home > Analysis > The Next Phase of the DARPA Electronics Resurgence Initiative (ERI): The Joint University Microelectronics Program 2.0 (JUMP 2.0)

The Next Phase of the DARPA Electronics Resurgence Initiative (ERI): The Joint University Microelectronics Program 2.0 (JUMP 2.0)

Last year, we offered an analysis of the Defense Advanced Research Projects Agency‘s (DARPA) track record of success with semiconductor innovation in collaboration with academia and the private sector, having seeded the field of neuromorphic computing from 2008-2014 to the tune of $52 million in a collaboration with the Department of Energy, various universities and IBM Almaden Research. The analysis was prompted by the further commercialization in 2021 of neuromorphic computing innovation, in the form of Intel’s Loihi 2 Chip Platform and Lava Open-source Software Framework.  This track record of public/private collaboration continues, as DARPA recently announced it has joined a “public-private partnership to address challenges facing microelectronics advancement.”

DARPA Electronics Resurgence Initiative (ERI) and the Joint University Microelectronics Program 2.0 (JUMP 2.0)

Source: https://www.darpa.mil

The partnership, the Joint University Microelectronics Program 2.0 (JUMP 2.0), is the next phase of the DARPA Electronics Resurgence Initiative (ERI).   Innovation in “semiconductor computational capability, resources and size, weight, and power consumption (SWaP)” continues to be the centerpiece of the five-year, $1.5 billion DARPA ERI and the $52 billion 2021 CHIPS Act.

The DARPA ERI  was launched in 2017 by the DARPA Microsystems Technology Office (MTO)  “to ensure far-reaching improvements in electronics performance well beyond the limits of traditional scaling by way of miniaturizing transistors and other components and increasing the complexity of component integration. The ERI is designed to draw on new and existing DARPA programs to make a significant investment into enabling circuit specialization and managing complexity”.  According to the DARPA ERI announcement of the program, “JUMP 2.0, led by Semiconductor Research Corporation (SRC), aims to fuel exploratory research in microelectronics at U.S. university research centers.”

In a statement, Dev Palmer, deputy director of the DARPA MTO and lead on JUMP 2.0., also referenced the Focus Center Research Program (FCRP) consortium, started in 1998, as a further example of how DARPA has “maintained strong collaborations with academia, the defense industrial base, and commercial semiconductor industry to accelerate the pace of innovation and chart a path forward in advancing microelectronics.”

The Special Notice issued by DARPA last month outlines the research themes of JUMP 2.0:

  • Cognition: Next-generation AI systems and architectures
  • Communications and Connectivity: Efficient communication technologies for ICT systems
  • Intelligent Sensing to Action: Sensing capabilities and embedded intelligence to enable fast and efficient generation of actions
  • Systems and Architectures for Distributed Compute: Distributed computing systems and architectures in an energy-efficient compute and accelerator fabric
  • Intelligent Memory and Storage: Emerging memory devices and storage arrays for intelligent memory systems
  • Advanced Monolithic and Heterogenous Integration: Novel electric and photonic interconnect fabrics and advanced packaging
  • High-Performance Energy Efficient Devices: Novel materials, devices, and interconnect technologies to enable next-generation digital and analog applications

The JUMP 2.0 Research Announcement is available on the SRC website at https://www.src.org/compete

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Tagged: DARPA
Daniel Pereira

About the Author

Daniel Pereira

Daniel Pereira is research director at OODA. He is a foresight strategist, creative technologist, and an information communication technology (ICT) and digital media researcher with 20+ years of experience directing public/private partnerships and strategic innovation initiatives.